Microelectronic devices often use solder projections (also referred to as bumps) in order to establish an electrical connection to other microelectronic devices. In a flip chip connection type integrated circuit, solder bumps are formed on the input/output (I/O) pads, on the test pads, on the power pads, and on the ground pads of an integrated circuit chip. The input/output (I/O) pads, the test pads, the power pads, and the ground pads are collectively referred to as “bump pads.” The face of the chip with the solder bumps is then placed in contact with a printed circuit board so that the solder bumps are aligned with corresponding solder pads on the printed circuit board. Heat is applied to melt the solder bumps and form an electrical connection between the bump pads of the chip and the solder pads of the printed circuit board.
It is often necessary to place a solder bump at a location on a chip that is not located directly over a corresponding underlying circuit. This is accomplished by adding additional layers to the chip (1) to provide an electrical connection between the solder bump and a corresponding metal pad, and (2) to provide an additional passivation layer to insulate the electrical connection between the solder bump and the corresponding metal pad. This process is generally referred to as “redistribution.” The electrical connection usually comprises a metal layer referred to as a “redistribution metal layer.”
FIG. 1 illustrates a portion of a typical prior art integrated circuit chip 100 showing solder bump 120 attached to and electrically connected to an “under bump metallurgy” (UBM) layer 130. UBM layer 130 forms a bump pad on which solder bump 120 is deposited. UBM layer 130 is attached to and electrically connected to redistribution metal layer 140. Redistribution metal layer 140 extends from UBM layer 130 to metal pad 150. Metal pad 150 is used for wire bonding in some cases. Metal pad 150 can also be used as an intermediate connecting pad between an active circuit area and a solder bump pad.
Redistribution metal layer 140 is attached to and electrically connected to metal pad 150. Metal pad 150 is mounted on silicon layer 160. Active circuits 170 are also mounted on silicon layer 160. A primary passivation layer 180 is applied to cover silicon layer 160 and active circuits 170. A secondary passivation layer 190 is applied to cover redistribution metal layer 140 and primary passivation layer 180.
When integrated circuit chip 100 is manufactured, silicon layer 160 is manufactured first. Then the active circuits 170 are added. Next metal pad 150 is placed on silicon layer 160. Then primary passivation layer 180 is applied to cover silicon layer 160 and metal pad 150 and active circuits 170. Primary passivation layer 180 is then etched to uncover a portion of metal pad 150.
At this stage the fabrication of the basic functional chip is complete. The next stage is to provide “redistribution” by adding redistribution metal layer 140, secondary passivation layer 190, and UBM layer 130. It is common practice to fabricate integrated circuit chip 100 in two stages. In the first stage, the basic functional chip is fabricated. In the second stage, the “redistribution” process is performed.
The “redistribution” process is sometimes not performed at the facility where the basic functional chip was fabricated. The “redistribution” process is sometimes subcontracted out to be performed at some other facility. In some instances the quality of the “redistribution” process performed at a subcontractor's facility may not be sufficiently high to qualify the basic functional chip for high reliability applications.
There is therefore a need in the art for an improved system and method for providing a high quality “redistribution” process for an integrated circuit chip. There is also a need in the art for providing a high quality redistribution metal layer in an integrated circuit chip.